Electrical Integration and Test Engineer w/Active TS/SCI

Job opening ID
1946

Posting title
Electrical Integration and Test Engineer w/Active TS/SCI

Roles and responsibilities
Must be a US Citizen
15 month contract position
W2 with full benefits
Must be able to pass background check and drug screen

Job Description:
Electrical integration and test engineer that will develop safe to mate activity plans as part of the project planning process. This engineer must be have a knowledge of electrical integration and be able to read Circuit Data Sheets to generate safe to mate procedures. Familiarity with standard electrical test equipment. For example, oscilloscopes, digital multimeters, power supplies, etc.... Experience in writing procedures and test reports and experience in presenting work to peers. 
•You will be responsible for developing and advancing the electrical engineering subsystem required for science grade instruments. 
•Will participate in a coordinated effort to understand and improve electronic subsystems that support the instrument systems. 
•A phenomenal opportunity to be part of a team with a full range of integrated custom hardware, calibration and alignment equipment. 
•Design and develop circuits used in electronic devices. 
•Responsible for integrated circuit or printed wire board design, device evaluation and characterization, circuit analysis, test and support equipment design, prototype construction and checkout. 
•Designs electronics subsystems and system architecture and develops requirements and specification. 
•Be a part of developing advanced technology for use in electronics components and systems. 
•Prepares test methods and specifications. Analyzes equipment to establish operating data and conducts experimental tests. May include specifying, designing and testing for compatibility with applicable electromagnetic environments. 
•Applies wide-ranging experience and advanced knowledge in field to derive and document assembly level engineering requirements, specifications and interface definitions 
•Define and document electrical interfaces between spacecraft subsystems. 
•Work with subsystem leadership teams to gain consensus on developed electrical interface solution which meets engineering and cost requirements 
•Execute electrical interface design improvements as required to support current and new product changes. 
•Performs analytical analysis on complex or critical electrical interfaces 
•Ability to perform high level communication programming interface development 
•Responsible for highly complex and critical FPGA and/or analog design and implementation. 
•Leads design teams in development of highly complex and critical FPGA and/or analog circuits.

Required Skills:
•Requires a Bachelors degree in Electrical, Electronics, Mechanical or related technical discipline with 6 years of related experience; Masters with 4 years of related experience, or PhD with 2 years of related experience. 
•Wide-ranging experience and advanced knowledge in one or more of the following areas: subsystem electrical interface design and implementation 
•Broad knowledge in fundamental theoretical concepts and practices of electrical engineering. 
•Deep understanding and wide application of advanced principles, theories, concepts and techniques in electrical engineering resulting in contributions to the development of new theories and methods. 
•Complete knowledge of industry and/or academic practices and standards across a range of applications related to electrical engineering and electrical interface design. 
•Skills spanning design, analysis, characterization, simulation, test and/or verification of electrical circuits and assemblies. 
•Working knowledge of OASIS, C++, C# programming, LabVIEW, MATLAB, experience with digital I/F, serial communication RS-232, digital signaling circuit RS-422, 1553 data bus communications protocol with programming lab equipment, experience with FPGA programming. •Familiarity with lab test equipment (e.g., oscilloscope, Digital Multimeter, General Purpose Interface Bus, power supplies, etc.) 
•Must have system level hardware and software experience in EGSE with grounding and isolation and experience in presenting work to peers.
Engineer must have an active TS/TK clearance

Desired Skills:
•Knowledge of JPL procedures and policies.

Number of positions
1

Location
Pasadena

State
California