Sr. FPGA Verification/Design Engineer

Job opening ID
2415

Posting title
Sr. FPGA Verification/Design Engineer

Roles and responsibilities
12 month contract position
W2 with full benefits
Customer and contract specific training will be required and provided.


Job Description:
As an FPGA Engineer IV you will lead the planning and execution of FPGA design activities for highly complex and unique electronics systems with Laboratory wide impact. Specific responsibilities of this position include:
•FPGA design lead generating design specification, architectural trade-offs, coding RTL, synthesis, & place-n-route.
-Language: Verilog/SystemVerilog
-Simulator: Mentor Questa
-Synthesis: Synopsys Synplify Pro
-P&R: Microsemi Designer 9.2 or Xilinx ISE
•Participate in peer and developmental reviews.
•Perform design analyses and design verification.
•Provide support to hardware testing and post-delivery integration.


Required Skills:
•Must be a US Citizen or Green Card Holder
•Offer contingent on ability to successfully pass a background check and drug screen
•This position requires a Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical discipline with a minimum of 9 years of related experience; a Master’s degree in similar disciplines with typically a minimum of 7 years of related experience; or a PhD in similar disciplines with typically a minimum of 5 years related experience.
•Experience with complex and large scale FPGA development.
•Experience with the latest industry FPGA development tools, design flow and verification methodology, such as UVM and OVM.
•Working knowledge with implementing FPGA designs using industry standard FPGA development languages, such as Verilog and System Verilog.
•Extensive knowledge of best industry practices in electronics and FPGA development, implementation, testing, and verification.
•Excellent oral/written communication and presentation skills.
•Ability to work effectively in a team.


Number of positions
1

Location
Pasadena

State
California